This invention relates generally to semiconductor device structures and more particularly semiconductor device structures wherein transistor devices are formed in a semiconductor body disposed on an insulating substrate.
As is known in the art, transistors, such as metal oxide silicon (MOS) transistors, have been formed in isolated regions of a semiconductor body, such as in an epitaxial layer which was itself formed on a semiconductor, typically bulk silicon, substrate. With an n-channel MOS field effect transistor (FET), the body is of p-type conductivity and the source and drain regions are formed in the p-type conductivity body as N+type conductivity regions. With a p-channel MOSFET, the body, or epitaxial layer, is of n-type conductivity and the source and drain regions are formed in the n-type conductivity body as P+type conductivity regions.
It has been suggested that the semiconductor body, or layer, be formed on an insulating substrate, or over an insulating layer formed in a semiconductor substrate. Such technology is sometimes referred to as Silicon-on Insulator (SOI) technology. Silicon-on Insulator MOS technologies have a number of advantages over bulk silicon MOS transistors as described on "Silicon-on-Insulator Technology: Materials to VLSI" by Jean-Pierre Colinge, published by Kluwer Academic Publisher, 1991 at pages 1-5. These advantages include: reduced source/drain capacitance and hence improved speed performance and higher operating frequency; reduced N+ to P+ spacing and hence higher packing density; and higher "soft error" upset immunity (i.e., the immunity to the effects of alpha particles strikes). These advantages make SOI MOS technologies an attractive alternative to bulk MOS in the deep-sub-micrometer geometry regime.
One disadvantage of SOI transistors is the lack of a bulk silicon or body contact to the MOS transistor. That is, it is desirable to connect the p-type conductivity body, in the case of an n-channel MOSFET, or the n-type conductivity body, in the case of a p-channel MOSFET, to a fixed potential. This prevents various hysteresis effects associated with having the body potential "float" relative to ground. With bulk silicon MOSFETs such is relatively easy because the bottom of the bulk silicon can be easily electrically connected to the fixed potential. With an SOI transistor, however, the body is electrically isolated from the bottom of the substrate. Thus, SOI transistors without body contacts for coupling to ground are compact; however, they can suffer from the so-called "kink" effect or from parasitic lateral bipolar action. Both these effects can prevent proper circuit operation.
More particularly, the "kink" effect originates from impact ionization, and has been described in the above referenced publication at page 189. When an SOI MOSFET is operated at a relatively large drain-to-source voltage, channel electrons with sufficient energy cause impact ionization near the drain end of the channel. The generated holes build up in the body of the device, thereby raising the body potential. The increased body potential reduces the threshold voltage of the MOSFET. This increases the MOSFET current and causes the so-called "kink" in SOI MOSFET current vs. voltage (I-V) curves.
With regard to the lateral bipolar action, if the impact ionization results in a large number of holes, the body bias may be raised sufficiently so that the source region to body p-n junction is forward biased. The resulting emission of minority carriers into the body causes a parasitic npn bipolar transistor between source, body and drain to turn on, leading to loss of gate control over the MOSFET current.
Both the "kink" effect and parasitic bipolar effects can be avoided if charge is not allowed to accumulate in the body. An electrical bulk, or body, contact can be used to extract the charge. Because the hole charge in the body will move to lower potential regions, the body contact and the source terminals are typically tied together to eliminate the "floating body" effect. Several body contact schemes have been proposed for SOI MOSFET's, but these generally add to the size of MOSFET and neutralize the packing density benefits of SOI. FIGS. 1A-1D illustrate four methods encountered in the prior art for forming body contacts. FIG. 1A shows a conventional SOI n-MOSFET device 10a without a body contact. Any hole charge in the body cannot easily be removed. FIG. 1B shows an MOSFET device 10b with a body contact 12 at one end of the gate. A p+ diffusion is in contact with the p-type body under the gate. Hole charge in the body flows to the end of the device 10b and is collected by the body contact 12. If the device width is large, this structure may not prevent the "kink" effect since the resistance of the channel region typically is large, and holes may not be able to reach the end of the device with the body contact 12. Another disadvantage of this structure is the additional area required for the formation of the body contact 12. FIG. 1C shows another type of body contact, commonly called the H-gate structure. This structure solves the problem of collecting the charge from the body of wide MOSFET's. Here, a body contact 16 is provided at each end of the channel of n-MOSFET device 10c, allowing devices of larger widths. However, note that this structure requires significantly more area than the simple MOSFET of FIG. 1A. FIG. 1D shows a body contact 18 that is compact compared to that shown in FIGS. 1B and 1C. In this n-MOSFET device 10d, part of the source junction is doped p-type. This p-type region is shorted to the source and serves as a body contact since it is in contact with the body under the channel. Note however that in this case, the source/drain symmetry of the MOSFET 10d has been lost. As is also known, the source and drain terminals of MOSFET's are often required to be switched during operation, such as in "pass" transistors. Therefore, this mode of operation is not possible with the device 10d because the source and drain are not structurally symmetric.
Thus, prior art body contact schemes shown in FIGS. 1B-1D fall into two categories: either they consume additional area, as in FIGS. 1B-1C, or they do not allow source and drain to be interchanged, as in FIG. 1D.